Build Your Future With
Core Edge Solutions

Role Overview

As an ASIC Design Engineer at Core Edge Solutions, you will drive the hardware foundation of our next-gen edge computing accelerators. Working closely with architecture, verification, and physical design teams, you will turn complex mathematical algorithms and neural network kernels into efficient silicon implementations.

Key Responsibilities

• Author detailed micro-architecture specifications and translate requirements into synthesizable SystemVerilog/Verilog RTL.
• Perform static timing analysis (STA), linting, CDC/RDC checks, and formal equivalence verification.
• Collaborate with physical design engineers to achieve target clock frequencies, power, performance, and area (PPA) goals.
• Participate in silicon bring-up, validation, and laboratory characterization of ASIC chips.

Qualifications & Requirements

• BS/MS/PhD in Electrical Engineering, Microelectronics, or related discipline.
• 5+ years of experience in digital ASIC/SoC design and RTL implementation.
• Strong proficiency in SystemVerilog, Verilog, and industry-standard EDA tools (Synopsys, Cadence).
• Experience with high-speed interfaces (PCIe, DDR, AXI/AHB) and low-power design methodologies (UPF).